The MATQu project follows a standard work package structure consisting of five technical work packages (WP1 – WP5) enclosed by two non-technical work packages (WP6 and WP7) as can be seen below.
- WP 1 – Specific High Resistivity and Low defectivity substrates
- WP 2 – Materials, modules, and processes for superconducting qbits
- WP 3 – 3D packaging and bonding
- WP 4 – Characterization tools and Benchmarking
- WP 5 – Simulation and Characterization Demonstrators
- WP 6 – Dissemination and Communication
- WP 7 – Management
Images and videos of the project‘s results
Microscopy image sequence of a representative photoresist-stripping process by aqueous, NMP-free, and sustainable fluids
The sequence shows microscopy images (100x & 200x magnification) of a representative photoresist-stripping experiment. The attacking and lift-off behavior of different resists from various semiconductor substrates (e.g., Si-wafers) were studied in detail.
Video of a representative photoresist-stripping process by aqueous, NMP-free, and sustainable fluids
The video demonstrates a representative photoresist-stripping experiment. The lift-off behavior of different resists were studied in detail. The formulations were optimized towards the fastest possible times to completely remove specific layers from various substrates.
Standardized methodology for superconducting resonator testing was proposed across the consortium to enable unambiguous intercomparability across the different testing laboratories. Test resonator designs were created to support the activities by several partners aiming to find improved materials and fabrication processes for quantum computing applications.
Three different tailor-made high-performance photoresist-stripper formulations were developed within the MATQu project. All formulations are water-based and revealed no etching towards critical TiN layers. Comprehensive studies were carried out. Therefore, time dependent measurements and different types of plasma-etch pretreaments were investigated.
A transmon qubit is formed by shunting a Josephson junction with an extremely low-loss capacitor. In the vast majority of presently fabricated superconducting qubits, with coherence times comparable to state of the art, the Josephson junctions are superconductor-insulator-superconductor (SIS) junctions formed by shadow angle evaporation and lift-off of aluminum, typically on small coupons. In this report, we describe our progress in moving this conventional process onto full-wafer tools and in developing alternative junction fabrication process which does not use lift-off. Abandoning lift-off has the potential to improve yield, parameter control, and process compatibility with other processing steps. Here, we have, especially, investigated and utilized the side-wall spacer passivated (SWAPS) tunnel junction fabrication technique.
A transmon qubit is formed by shunting a Josephson junction with an extremely low-loss capacitor. In the vast majority of presently fabricated superconducting qubits, with coherence times comparable to state of the art, the Josephson junctions are superconductor-insulator-superconductor (SIS) junctions formed by shadow angle evaporation and lift-off of aluminum, typically on small coupons. In this report, we describe our progress in moving this conventional process onto full-wafer tools and in developing alternative junction fabrication process which does not use lift-off. Abandoning lift-off has the potential to improve yield, parameter control, and process compatibility with other processing steps. Here, we have, especially, investigated and utilized the side-wall spacer passivated (SWAPS) tunnel junction fabrication technique.
Indium deposition on copper and on superconductive substrates on wafer scale ongoing at imec.
This report presents the cabling specifications discussed with project partners and summarizes results of prototypes.
Kiutra has identified characterization tasks that could significantly benefit from a rapid test system for cryogenic temperatures and derived the adaptations to the cryostat prototype needed for their implementation. The results of our analysis were summarized in a report.
This report states the plan on the dissemination and communication activities of the project.
This report states an update on the dissemination and communication activities of the project.
The project Kick-off meeting took place on June 17th, 2021.
The first half-term report describes the work carried out in the MATQu project from project months one to six.
The second half-term report describes the work carried out in the MATQu project from project months 13 to 18.
See corresponding Deliverable D2.5
The consortium-level goals for resonator quality factor and coherence time metrics were consolidated and general instructions on data quality and statistics were created.
The Spherolyte In process was successfully adjusted and applied to deposit indium bumps on substrates with thin copper seed layers. Spherolyte In SC was successfully developed and applied to deposit indium on substrates with superconductive seed layers (e.g. Mo).
Optimization ongoing in collaboration with imec.
Technic Through Silicon Vias (TSV) cleaning blends, photoresist strippers, as well as wet etchant solutions (TiN, Nb, Cu) have been evaluated on wafers provided by partners (IMEC and CEA). Reduction of scallop effect in TSV has also been investigated.
Compatibility of the deposited indium with the CMP process could be shown in collaboration with imec.
Elevate Indium D4900 solution has been validated for indium deposition (thin film and bumps) over copper and ruthenium seed layers. New products have been developed for TSV cleaning: TechniClean D-BOS series. TechniStrip® solutions dedicated to photoresist stripping have been determined to be compatible with Indium and superconductor materials (Nb, NbN, TaN). A new wet etching solution is under development to etch Niobium selectively to Indium.
Indium plated wafers (blanket and patterned) have been provided to partners for further characterization analyses (critical temperature, intermetallic cross-section observation, and reflow tests). A new wet etching solution is under development to etch Ruthenium selectively to Indium, that will enable the optimization of the full process of deposition and etching.
Intelligent fluids has developed a highly performant water-based formulation for TSV cleaning. The novel formulation has passed the internal qualification process. First technical scale production of the prototype was produced for delivery of the material to the collaboration partner IMEC.
Standardized methodology for superconducting resonator testing was proposed across the consortium to enable unambiguous intercomparability across the different testing laboratories. Test resonator designs were created to support the activities by several partners aiming to find improved materials and fabrication processes for quantum computing applications.
Kiutra has completed the assembly of the basic ADR cryostat prototype and reported on its performance.
Various measurement types and methodologies were assessed to investigate how to best utilize the characterization tool development in MATQu. Resonator and qubit measurements were conducted in conditions emulating the ADR-based rapid turnaround measurement system to validate the compliance in screening measurements.
IFC successfully developed a prototype product for the fast removal of a pCAR photoresist from a Si-wafer. The prototype reveals a high compatibility towards TiN, proven by etch rate determination methods and surface roughening analyses.
The first project year has been finished successfully and was stated in a corresponding report.